The present invention is directed to an apparatus and method for processing a microelectronic workpiece. More particularly, the present invention is directed to an improved apparatus and method of processing a microelectronic workpiece using a metrology result representative of a microelectronic workpiece condition. For purposes of the present application, a microelectronic workpiece is defined to include a microelectronic workpiece formed from a substrate upon which microelectronic circuits or components, data storage elements or layers, and/or micro-mechanical elements are formed.
The fabrication of microelectronic components from a microelectronic workpiece, such as a semiconductor wafer substrate, polymer or ceramic substrate, etc., involves a substantial number of operations performed on the microelectronic workpiece. Such operations include, for example, material deposition, patterning, doping, chemical mechanical polishing, electropolishing, and heat treatment.
Material deposition processing involves depositing or otherwise forming thin layers of material on the surface of the microelectronic workpiece. Patterning provides deposition or removal of selected portions of these added layers. Doping of a microelectronic workpiece such as a the semiconductor wafer, is the process of adding impurities known as xe2x80x9cdopantsxe2x80x9d to the selected portions of the microelectronic workpiece to alter the electrical characteristics of the substrate material. Heat treatment of the microelectronic workpiece involves heating and/or cooling the microelectronic workpiece to achieve specific process results. Chemical mechanical polishing involves the removal of material through a combined chemical/mechanical process, while electropolishing involves the removal of material from a microelectronic workpiece surface using electrochemical reactions.
Production of semiconductor integrated circuits and other microelectronic devices from microelectronic workpieces, such as semiconductor wafers, typically requires the formation and/or electrochemical processing or one or more thin film layers on the microelectronic workpiece. The microelectronic manufacturing industry has applied a wide range of thin film layer materials to form such microelectronic structures. These thin film materials include metals and metal alloys such as, for example, nickel, tungsten, tantalum, solder, platinum, copper, aluminum, gold, etc., as well as dielectric materials, such as metal oxides, semiconductor oxides, and perovskite materials.
Electroplating and other electrochemical processes, such as electropolishing, electro-etching, anodization, etc., have become important in the production of semiconductor integrated circuits and other microelectronic devices from such microelectronic workpieces. For example, electroplating is often used in the formation of one or more metal layers on the microelectronic workpiece. These metal layers are typically used to electrically interconnect the various devices of the integrated circuit. Further, the structures formed from the metal layers may constitute microelectronic devices such as read/write heads, etc.
Electroplated metals typically include copper, nickel, gold, platinum, solder, nickel-iron, etc. Electroplating is generally effected by initial formation of a seed layer on the microelectronic workpiece in the form of a very thin layer of metal, whereby the surface of the microelectronic workpiece is rendered electrically conductive. This electro-conductivity permits subsequent formation of a blanket or patterned layer of the desired metal by electroplating. Subsequent processing, such as chemical mechanical planarization, may be used to remove unwanted portions of the patterned or metal blanket layer formed during electroplating, resulting in the formation of the desired metallized structure.
Electropolishing of metals at the surface of a microelectronic workpiece involves the removal of at least some of the metal using an electrochemical process. The electrochemical process is effectively the reverse of the electroplating reaction and is often carried out using the same or similar reactors as electroplating.
Anodization typically involves oxidizing a thin-film layer at the surface of the microelectronic workpiece. For example, it may be desirable to selectively oxidize certain portions of a metal layer, such as a Cu layer, to facilitate subsequent removal of the selected portions in a solution that matches the oxidized material faster than the non-oxidized material. Further, anodization may be used to deposit certain materials, such as perovskite materials, onto the surface of the microelectronic workpiece.
As the size of various microelectronic circuits and components decreases, there is a corresponding decrease in the manufacturing tolerances that must be met by the manufacturing tools. It is desirable that electrochemical processes uniformly process the surface of a given microelectronic workpiece. It is also desirable that the electrochemical process meet microelectronic workpiece-to-microelectronic workpiece uniformity requirements.
Multiple processes must be executed upon a microelectronic workpiece to manufacture the desired microelectronic circuits, devices, or components. These processes are generally executed in processing tools that are specifically designed to implement one or more of the requisite processes. In order to automate the processing and minimize operator handling, tool architectures have been developed that incorporate multiple processing stations and automated transfer of the microelectronic workpieces from one processing station to the next.
In such tools, the microelectronic workpieces are processed individually at the various processing stations. Furthermore, multiple microelectronic workpieces are concurrently processed at different processing stations. Thus, one microelectronic workpiece may be processed in one of the processing stations while another microelectronic workpiece is concurrently processed in another one of the processing stations. In this way, a pipeline processing approach can be developed, which enhances production throughput. Additionally, processing steps that take longer to perform may have multiple processing stations devoted to performing that particular processing step, thereby enhancing production throughput.
Numerous processing tools have been developed to implement the foregoing processing operations. These tools take on different configurations depending on the type of microelectronic workpiece used in the fabrication process and the process or processes executed by the tool. An exemplary tool embodiment is disclosed in U.S. patent application Ser. No. 08/991,062, filed Dec. 15, 1997, entitled xe2x80x9cSemiconductor Processing Apparatus Having Lift and Tilt Mechanism.xe2x80x9d
One tool configuration, known as the LT-210C(trademark) processing tool and available from Semitool, Inc., of Kalispell, Mont., includes a plurality of microelectronic workpiece processing stations such as one or more rinsing/drying stations, one or more wet processing stations, and one or more thermal processing stations that includes a rapid thermal processing (xe2x80x9cRTPxe2x80x9d) reactor. Such wet processing operations include electroplating, etching, cleaning, electroless deposition, electropolishing, etc..
In the processing of microelectronic workpieces, the output of one process is the input for the next process, and such output typically influences the output of the next process. This is true, for instance, in the case of a copper damascene interconnect process, with the barrier/seed layer process output influencing the output of the copper electrochemical deposition (xe2x80x9cECDxe2x80x9d) process, or the output of the copper ECD process influences the output of the copper chemical mechanical polishing (xe2x80x9cCMPxe2x80x9d) process. This is also the case in most thin film ECD processes, where the thickness and the thickness uniformity of the seed layer affect the thickness uniformity of the plated film.
The present inventors have recognized the desirability of automatically adjusting a workpiece processing step to effect its output to compensate for a condition on the workpiece such as a layer thickness, to provide an output which is tuned to the requirements determined in part by the incoming material.
The present invention provides an apparatus and method for processing a microelectronic workpiece, using a metrology measurement of a microelectronic characteristic, such as seed layer thickness or uniformity, measured on a microelectronic workpiece, to influence or control the process. The metrology measurement can be taken subsequent to a prior processing step, i.e., a feed forward control, or subsequent to a process being controlled, i.e., a feed back control. The metrology measurement can be taken on each microelectronic workpiece to be processed, or on a first microelectronic workpiece, or a sample microelectronic workpiece, for a batch of microelectronic workpieces. In general, the invention is useful in situations where a process output affects the output of a subsequent process output in a known manner, or in a manner that can be empirically determined.
When a relationship between a first process output and a subsequent, second process output as described above exists, the second process can be modified in a manner determined by the output of the first process, in order to ensure that the output from the second process is as desired (e.g. as uniform and repeatable as possible), regardless of variation in the output of the first process. The desired output could be different than merely trying to produce uniform results, however; for example, it is possible that intentional variation in one parameter (e.g. film thickness) could be introduced in order to compensate for another non-uniformity (e.g. line width) to produce uniform electrical results. Furthermore, a measurement of the output of the first process can be incorporated into the apparatus that performs the second process, and the data from this measurement can be used as an input to a mathematical algorithm that is used to tune the second process.
The apparatus of the invention can include a control that modifies the process parameters of a process in order to compensate for material variations in the incoming microelectronic workpiece, in order to produce a uniform output or desired output from the process. The material variations in the microelectronic workpiece fed to this second process could be due to variability in a prior process step or to the use of different operations or processing chambers to feed the process. The apparatus of the invention can include an in-line metrology measurement system to determine the condition of the incoming microelectronic workpiece material, and a control for altering the process conditions based on the measurement results, i.e., a feed forward control. The metrology system may additionally be used to measure the output of the process as well. Alternately, the metrology system can measure the output of the process and the control can alter the process conditions of subsequently processed microelectronic workpieces, i.e., a feed back control.
According to one exemplary aspect of the invention, metrology integration and ECD seed layer integration are utilized. The metrology integration, either physical or virtual through a network link, allows dynamic control of the process. The ECD seed layer integration allows clustered processing which lowers costs and facilitates xe2x80x9csplit lotxe2x80x9d processing, i.e., differing process recipes for two or more groups of workpieces within a batch.
The invention can be advantageously configured in a high volume manufacturing configuration or a process development configuration.
According to the high volume configuration, such as for an ECD tool, the tool preserves high volume ECD capability while also adding a xe2x80x9crepair or recoveryxe2x80x9d mode to maintain the finished plating integrity. Under normal operation, the tool may be used with or without periodic verification through in-line metrology.
The metrology system can be used to measure the first workpiece of a lot, or to measure from a specific process location of the prior step (e.g., a given chamber on a seed layer sputtering tool) to verify good incoming quality of seed layers or other parameters. Likewise, the metrology system can feed forward or feed back uniformity and thickness data to drive the process recipe for electroplating reactors.
The metrology system of the invention is particularly useful in the case of reactors having the advantageous ability to manipulate wafer uniformity through process recipe control. The reactors can be adjusted to varied electrochemical processing requirements, such as in response to metrology data, to provide a controlled, substantially uniform diffusion layer and electrical potential at the surface of the microelectronic workpiece that assists in providing a corresponding substantially uniform processing of the microelectronic workpiece surface (e.g., uniform deposition of the electroplated material). Such electrochemical processing techniques can be used in the deposition and/or alteration of blanket metal layers, blanket dielectric layers, patterned metal layers, and patterned dielectric layers.
The process and apparatus can be controlled with increased versatility when using the metrology data. Based upon the output from the metrology unit, the user can decide to stop the subsequent process to resolve the issues driving the prior process. For example, an electroplating process can be stopped when seed layer thicknesses are below acceptable tolerances. Alternately, the user can continue the subsequent processing and adjust the subsequent process steps or process parameter based upon the output from the metrology unit. For example, where seed layer thickness or uniformity is unacceptable, the user can insert an intermediate step and automatically xe2x80x9cfixxe2x80x9d a seed layer problem with a seed layer enhancement process, such as an electrochemical deposition (ECD) seed layer enhancement process. The user can also continue the processing and automatically adjust the process recipe on ECD reactors to achieve acceptable plating uniformity and thickness. Also, rather than attempt to fix or compensate for a seed layer non-uniformity, a rejected workpiece can be recovered in a non-compliance station, or sent first to a stripping unit to have the nonconforming layer removed and then sent to the non-compliance station. Microelectronic workpieces stored in the non-compliance station can be removed from the apparatus for recovery (reuse).
Furthermore, the apparatus of the invention is easily configured for high volume manufacturing with ECD seed layer enhancement integrated as part of the standard process, irrespective of the presence of seed layer non-uniformity. The number of ECD seed layer chambers can correlate to the throughput requirement. As dual damascene features continue to become more aggressive, the capability of physical vapor deposition (xe2x80x9cPVDxe2x80x9d) to conformably deposit the requisite seed layer in these features becomes limited. The ECD seed layer is a promising approach to extend ECD processes beyond the limits of current PVD technology.
An alternate exemplary embodiment of the tool incorporating the present invention is a process development configuration. This tool design is directed to developing optimized processes. The configuration allows a wide range of flexibility in process sequence and control. For example, a process engineer might want to measure incoming seed layer thickness, ECD seed layer deposition results, ECD fill results, and post annealing results. Since the plating solution reservoirs can be much smaller, the user may also quickly and easily interchange chemistries for rapid and low-cost experimentation. The user may want to run split lots with a wide variety of process combinations to determine feasibility of a production process.
Numerous other advantages and features of the present invention will become readily apparent from the following detailed description of the invention and the embodiments thereof, from the claims and from the accompanying drawings.